Tuesday, September 11, 2012

CHES 2012 - Day 2

The second day of CHES 2012 brings us a number of interesting sessions, among them a session devoted to Physically Unclonable Functions. PUF primitives have become popular in the research community and each year CHES attendees are able to hear about the state-of-the-art results. That happens this time as well, with a PUF session containing four papers, ranging from theoretical analysis of PUFs as basic building blocks for cryptographic schemes to practical evaluation of PUF implementations in ASICs.

In the first talk of the PUFs session, Ulrich Ruhrmair presented, firstly, an attack on two oblivious transfer and bit commitment protocols introduced at CRYPTO 2011 and secondly, as follow up, countermeasures that could be applied to mitigate those security issues.  

The most practical paper of the PUF session was “PUFs: Myth, Fact or Busted? A Security Evaluation of Physically Unclonable Functions (PUFs) Poured in Silicon” by Stefan Katzenbeisser et al. In the paper authors evaluate five different types of intrinsic Physically Unclonable Functions such as arbiter, ring oscillator, SRAM, flip-flop, latch PUFs. All aforementioned types were implemented in a TMSC 65 nm CMOS process technology. In total, 96 different AISC chips have been evaluated at different ambient temperatures and varying chip core voltages. Apart from practical results, the second contribution of the paper is the introduction of a PUF evaluation framework. More details, plots and full analysis are in the paper. The only missing part is an ageing test, where ASIC chips are stressed in different environmental conditions and thus ageing effect can be achieved. This ageing test will be carried out by authors in future work.

An interesting paper that concludes the PUF session has been presented by Anthony Van Herrewege from KU Leuven. The title of said presentation was “PUFKY: a fully functional PUF-based cryptographic key generator”. The authors successfully evaluated a practical and modular design for a key generation which uses PUFs primitive on FPGAs. In their work, the authors have used ring oscillator PUFs, but the modular approach easily allows to integrate other types of PUFs with a microprocessor. This flexibility allows to deploy prepared IP without much hassle.

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